Questions tagged [clock-speed]
Anything related to clock signal frequency (a.k.a. clock speed) issues in digital systems.
228 questions
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LCMXO640C-3TN144C Maximum Clock Frequency
I am a beginner with FPGAs and I want to find what is the maximum clock frequency where the I/O pins and PCLK pins of this FPGA "LCMXO640C-3TN144C" can work with.
MachXO Family Data Sheet ...
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What is meant by speed of a CPU or speed of a RAM module? [closed]
What is exactly meant by when one says the speed of RAM is 5MHz and CPU is 3GHz? Aren't they just semiconductor chips composed of logic gates,transistors and capacitors (logic gates are also made up ...
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Decrease system clock frequency in Quartus II?
How to decrease system clock frequency in Quartus II from standard 50 MHz to 2 Hz (two clock fronts per second)?
I find out it easier using constraints editing way, namely, SDC (Synopsys Design ...
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STM32H745 sometimes crashes when setting the system clock speed to 480MHz
As the title reads I have a STM32H745 on custom hardware and when I run the following code the device crashes about 50% of the time at some point after switching the system clock to PLL1. By "...
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ATSAME70 outputting clock on xin/xout and operating without crystal
I need to operate an ATSAME70 on an external 16MHz crystal. I had the crystal soldered onto the PCB and tried to enable it in MCC Harmony. For some reason the entire CPU started operating at a ...
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STM32 microcontrollers while(1) speed
I did a test on different micros like STM32F0 G030 F103 F401 and STM32H745.
I know that various units like NVIC, WIC, DWT etc. take the CPU out of the while loop and the CPU is always busy.
But how ...
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High time in External Clock drive
While looking for the rise time and fall time of external clock in ATMega328p, I came across the term "High time". Is it same as "ON time" i.e. time taken to reach 10% of amplitude?...
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Identify values for these resonators
I need some help to identify the values of these resonators. Anyone here have experience with such components?
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What does an AND gate inside a box mean?
I'm looking at this clock diagram, and it has five of these little boxes with symbols that look like AND gates inside them. But, they only have one input. What do they mean here?
Source here
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STM32G4 low-power mode
I have an issue with going into low power mode on the STM32G473.
To be able to use the low power regulator the SYSCLK must be below 2Mhz however it seems impossible to reduce the SYSCLK that low on ...
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Underclock the microprocessor [closed]
Suppose datasheet rated clock frequency range is 8MHz to 16MHz. What if we try to operate it at 6MHz. How will it impact the operation?
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FPGA clock only positive lag?
I have an FPGA with the following, simple clock divider, written in VHDL:
...
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SCLK : 50 [MHz] Rising Edge vs 25 [MHz] Dual Edge : Tradeoffs
TI manufacturers two near-identical drivers for matrixed LEDs, LP5890 and TLC6983. I was only able to determine the following ...
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Reliability issues with si5351 when generating two clocks with a phase difference of 90 degree
I am trying to generate two clocks of X-MHz each, X being a value ranging from 5 to 100. I chose si5351 chip for this as a breakout board was easily available from Adafruit. I used attached code to ...
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Trigger (Flip-flop) with under 3 ns delay?
I want to make nanosecond clock timer as a 64-bit counter.
There is a scheme (4-bit):
I am trying to find JK-trigger, or other, that can work with 300 Mhz clock speed, at least, i.e. 3.3 ns at most, ...
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How to determine the rise time to treat if the signal as a transmission line?
I know that If the length of the track is between 1/6 or 1/4 of the effective length of a feature like an edge a system can be regarded as lumped.
BUT A a lot of times, the rise time cannot be taken ...
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How can you achieve decent clock accuracy in microcontrollers (e.g., max 1 second drift in a year)? How do digital watch manufacturers accomplish it?
I am learning with microcontrollers (mostly PIC16/18 and AVR) for some time, making various experimental projects. One of things that I found surprisingly challenging is maintaining decent clock ...
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Need help understanding the concept of "power wall"
I am currently studying computer architecture and I am having some trouble understanding the concept of the "power wall".
I came across the following statement:
The term power wall ...
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Is it possible to use Si5351 to replace a crystal oscillator on a computer?
I have an old Macintosh IIfx and it originally runs with 80 MHz DIP-4 crystal oscillator (CPU speed is half of this, so 40MHz). So far I have used 100 MHz crystal oscillator to overclock without ...
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Am I solving this capacitance equation correctly?
The following is a datasheet excerpt about satisfying the clock-signal requirements for a low pass filter
When using the internal oscillator, the capacitance (COSC) from CLK to
ground determines the ...
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What determines the maximum clock rate for a CPU?
What factors determine the maximum CPU clock rate? A 6502, for instance, clocks in the megahertz range, while an Intel x64 chip typically clocks in the gigahertz range.
All things being equal, if the ...
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SPI bus termination for variable line length / variable number of slaves
There is a lot of information online for SPI bus termination, but my situation is a little bit different. I have created a system with the intention of 'plug and play' IMUs. Although the main ...
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Why can't you use any clock speed with an Arduino? [closed]
So if every IC is made of transistors what stops me from putting a ATmega328 on a breadboard with a 20 MHz clock so it will run faster? This is a rhetorical question. I don't need to know how I could ...
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ATMega32u4 minimum system clock for USB 2.0
I am trying to cut down the power consumption for an ATMega32u4.
The datasheet says, for USB 2.0 it needs an external clock, which it uses to generate a 48 MHz clock by multiplying the external clock ...
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Why didn't cpu clock frequency plateau at two orders of magnitude higher Hz?
Here is a back of the envelope estimate for an upper bound of clock frequency for modern CPU's:
The speed of light is 3·10⁸ m/s which is 3·10¹¹ mm/s, and I assume the speed of electricity is about 50% ...
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Minimum FPGA clock frequency
I currently work with two FPGAs, Microchip/Microsemi ProASIC3E and AMD/Xilinx Zynq-7020.
In their datasheets, the recommended minimum operating frequency is 1.5 MHz for the A3PE ProASIC3E chip. The ...
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Rise time and clock frequency: when does it start biting me?
I have spent quite a bit of time reading (mostly the questions and answers on here) about rise times of square waves and how they can cause transmission line effects (reflection, ringing, etc.).
...
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STM32F303RE Nucleo freezes at clock rate >40MHz
I have a STM32F303RE Nucleo board with Mecrisp-Stellaris Forth. The Forth console goes through USART2, the interface connected to the ST-Link part of the Nucleo board (changed from default USART1). ...
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How do I change and verify the clock frequency of Atmega4809 microcontroller? CLKOUT not working?
In the below code I am trying to get the clock frequency to show up on the CLKOUT pin which should be pinA7. But for some reason I don't get anything when measuring pinA7 on an oscillicope. I do see ...
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Self programming fails on ATmega2561
We've been programming a custom Board with an ATmega2561 via a serial (RS232) connection for years, mostly without problem.
We're using a custom bootloader that is closely based on recommondations in ...
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How to constrain a source-synchronous FPGA input?
I have a source-synchronous input to my FPGA (an Intel Cyclone 10 GX 10CX085), coming from an external chip whose datasheet gives the following information:
fmax = 300 MHz (single data rate)
tsetup = ...
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Why will clock signals have different phases after a frequency divider?
I have a question about data transport between two chips with series format.
I have two chips. Chip 1 will sent 8-bits data to chip 2. The picture shows a solution. I will provide a 100MHz clock from ...
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Digital circuit to compare clock frequencies
The task I am trying to do:
Design a digital circuit that takes in two clocks at different frequencies and finds the higher frequency clock. Eg: Say clk0 = 10MHz and clk1 = 5MHz and clk0 is given to ...
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SAM3x8e can't program over serial
UPDATE: Jan 2022. I put together a new pcb. This one has the JTAG header and I have an ATMEL-ICE. Otherwise the processor and support layout is mostly the same. I stripped the program down to simply ...
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How does the current processor technology with low clock rates (<10 GHz) deals with mmWave (>10 GHz) technology used in 5G?
What I mean is that most abundant computing processors in market have the clock frequencies in the range of 2-4 GHz and from wikipedia:
As of 2012, the CPU-Z record for the highest CPU clock rate is ...
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For a clocked circuit, what defines how fast the clock can be?
Imagine a typical PCB that's small, 6" per side. There's a clocked circuit on it. Making a 1kHz circuit is pretty easy. Making a 2kHz circuit isn't any harder, and neither is a 3kHz circuit. ...
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What does clock/signal speed actually do?
This is may be a silly questions but I am curious.
I know that in circuits power lines are at speed near light but why are signal lines so different?
Let's say I use I2C(MCP23017) I can choose between
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What refresh rate do digital stopwatches use?
We've all probably come across these kinds of electronic stopwatches at some point:
They almost always claim to count centiseconds (although this one counts in milliseconds), but do they really have ...
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What is the difference between the switching speed and clock speed of a chip [closed]
I learnt that the switching speed of Silicon-based devices are in the KHz range whereas that of III-V semiconductors like GaN are in the MHz range.
How does this differ from the clock speed that we ...
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How are system clock and oscillator frequency related?
My question is given a, for example, a quartz oscillator on a MCU board, how is the system clock generated? I'll break down this question into several parts below:
I always have the impression that ...
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Do all SDRAM applications require high-speed routing?
I am a chemistry student and I am beginning to realize that I have fallen into a EE rabbit hole..
I am trying to create a PCB (digital audio delay unit) from a schematic which includes a SDRAM, this ...
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Clock signal frequency [closed]
If the longest path that my digital signal must travel in a microprocessor is x cm. What would be the highest frequency of the clock signal for that chip?
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How to derive an exact 10Hz clock from the generated clock?
How do I go about getting an exact (or as close as possible) 10Hz clock from the generated clock? The master is 100MHz. I have used this 32-bit register to make a clock as close as possible to 10kHz ...
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ATMEGA328P Max Clock Speed Without Divider
Does anyone know what the max clock speed of the ATMEGA328P is, without the clock divider?
I know that people have been able to overclock the 328 to 30 - 50 Mhz, but I haven't found if those are using ...
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How to create a delayed clock pulse, then return to regular clock cycles
I am attempting to configure an LCD with just IC chips and I've been having problems. I've worked out that the main problem I am having is in the initialization of the lcd. It needs a goodly amount of ...
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FPGA Data Collector - What Specs Should I Look For? [closed]
I'm working on a high-speed data collection device for an ADC running at 80 Msps. After digging through resources on MCUs and asking several questions here and in other forums, I've turned my ...
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STM32F407 Clock Configuration Order
I have been taking a Udemy course on the STM32F407 and using the Discovery board to go along. However, clock configuration is not covered in the course. After some Googling and nose in the reference ...
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What's the difference between the maximum and cut-off frequencies of a single transistor compared to those of a circuit? [closed]
Many publications, when they speak about a single transistor, the maximum and cut-off frequencies are way higher than of the final circuit.
Example: A modern FinFET, some report a maximum oscillation ...
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STM32F407VG Discovery + CMSIS HSE Clock Configuration
I am trying to program an STM32F4 discovery board using Vscode, Platformio and CMSIS. However, I cannot set the right clock frequency. I have programmed it to blink an LED every second, except it ...
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Gigabit transceiver with MHz reference clock
I've some experience with Xilinx FPGA generating 10Gb/s over SMA loopback with on-off keying modulation (what scope shows) to perform BER test but the documentation shows it uses a reference clock in ...
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