Questions tagged [logic-gates]
Symbolic representation of ideal devices implementing boolean functions
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AND gate logic working as conditional power
I am trying to make a circuit that gives power only when all the conditions are true. I am planning on using bjt to do the job. Here are two ltspice simulations i have run. Assume the load to be ...
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How to make a logic circuit with LEDs as opposed to 1N4004s or the like?
Basically the title. I want to build a simple diode-resistor AND gate. I set one up in a simulator (I used both Falstad and TinkerCad)
simulate this circuit – Schematic created using CircuitLab
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Propagation delay in a ripple carry adder depends on the bit pattern
Please help me understand how propagation delay changes depending upon the input bit pattern in a ripple-carry adder.
Take 2 cases:
100+011. here no carry generated or propagated
001+111. here carry ...
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Threshold levels doubt on logic gates datasheet. Limit and typical values meaning
I'm working with 74HCT1G32 but I'm not sure how to interpret the datasheet value for high and low level voltage.
Let's talk, for example, about the high level.
In datasheets from other manufacturers, ...
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How to make two components trigger together?
I have a feedback circuit for a device I am designing. The goal is to sense temperature changes with thermistors and then if certain conditions are met I want to use an analog switch to disconnect a ...
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Is 74LS00 max current a capability or a limit?
a newbie question here.
Many datasheets specify the max input/output current for the integrated circuits. I'd like to know if that is the maximum they can provide or the maximum above which they break....
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Controlling 7-Segment Display
I am redesigning the control panel for a project I have been working on. I am using a rotary encoder to replace a set of 3 rotary dials, but I cannot use any microcontrollers or programming.
I plan on ...
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Will this work as an XOR gate?
Will this work? This will be part of a bigger circuit. But I first need to know if this circuit will work as an XOR gate.
The transistors are 2N2222 NPN transistors and the led is a typical red led ...
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Why does my Logisim FSM assert incorrect outputs for given input codes?
I’m designing a 3‑state finite state machine (FSM) in Logisim, with all inputs, outputs and states encoded, but when I apply certain input combinations the outputs don’t activate as I expect. Below is ...
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Logic Problem: "Selective AND Gate?"
I need a logic element with two inputs: A (the output from a zero crossing detector) and B (the output from a voltage comparator), and one output: Q (enabling a gate driver).
When both A and B go high,...
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How to find the signal that has the first rising edge
I'm working on creating a logic circuit that can detect which of the signals B and C have the first rising edge after a falling edge of signal A. The output should be low if B is first and high if C ...
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Minimizing a logic circuit using custom weights for the logic gates
Question
There exists tons of software that can minimize a logic circuit by providing a solution using the least amount of logic gates.
What I am interested in, however, is not the total number of ...
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Shift Phase Offset of Clock using only Digital Logic? [closed]
Suppose I have 3 separate square-wave digital 5V clocks, named A, B and C. All 3 clocks are ...
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What do you call a logic gate that turns if and only if input A is on and input B is off? [closed]
I was playing around with logic gates and using an and gate, an or gate, and a not gate I created a new logic gate that does this
A off B off output off
A on B off output on
A off B on output off
A on ...
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How does the SN74LS107A JK flip flop avoid racing?
In the diagram below, if !CLR, Q and K are high and a clock pulse comes in. AND2 would have its output low and AND4 would be high. On the falling edge of the clock, AND2 and AND4 would both be low and ...
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Why doesn't this NPN Transistor XOR Gate work
I'm trying to build transistor logic gates in tinkercad and am stuck on the XOR gate. I built the circuit below but it doesn't work. The led light won't turn on at all regardless of what position the ...
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Debounce pushbutton on FPGA by using two D Flip Flop
I'm designing a module debounce pushbutton that uses 2 D Flip Flops and a Slow Clock (4Hz) and an AND Gate(Output) to ensure that the signal will generate with a single pulse. I have learned this ...
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Does This AND Gate Stay 0 Forever? [closed]
Two independent bits oscillate at the same frequency (50% duty cycle) and are connected to an AND gate.
Initially, the first bit holds a constant 0, and the second bit holds a constant 1. At time <...
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NOT logic using Schmitt Trigger
Assume such a circuit:
Why should I use a schmitt trigger NOT and not a normal one?
If I am not mistaken, schmitt trigger turns a hypothetical input signal that varies slowly (which is not desired!) ...
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How can you create a 4 input XOR gate using only mechanical switches?
I've been working on this problem for a while and couldn't find a solution. I tried all sorts of combination of SPDTs and DPDTs. I started by trying to build off of a two input XOR gate which is ...
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How to hold a signal high from one pulse e reset it before another pulse
Scenario: a control signal is 0 and after a while there is a pulse (1) of X milliseconds. When the pulse come I have to hold its value in another signal, until a proper condition brings it to zero, ...
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Why does one implementation of an XOR gate with only NAND gates need 4 whereas the one I sketched up has 5?
When deriving the XOR implementation with only NAND gates, I attempted to make versions of the AND OR and NOT gates used in it with NAND gates and then put it together and start pulling out ...
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Confusion about t a 3-inputs/outputs logic circuit with only two NOT gates in Logisim
I’m working on a logic circuit exercise in Logisim and I need some help.
Exercise:
Design a circuit with three inputs (a, b, c) that uses only OR, AND, and exactly two NOT gates. The circuit must ...
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How can I turn toggling a continuous signal into a pulse? [duplicate]
I’m trying to take a signal from a toggleable source, into a pulse signal. However I’m only restricted to AND, NOT, OR, and XOR gates. I’ve been trying to find a method for this for a while now, and ...
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What does the vertical bar at the end of a logic gate mean?
I was looking at the datasheet for the 74LS238, and looking at the logic diagram shows: .
Does this mean that it acts as both an inverter and a buffer? To be more clear, if I hooked up the inverted ...
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Clock Pulse Fed through AND gate twice. What does this accomplish?
So I'm working through replicating a circuit on an old arcade PCB and I'm trying to understand what this circuit is doing. It seems to me that the AND gate is irrelevant, and that the Jumper config is ...
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Logisim: Oscillation apparent in Traffic Light Control
I am working on simulating a traffic light control based on the "Digital Fundamentals" book by Thomas L. Floyd, but I encountered an "oscillation apparent" error when one of the ...
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How to Modify 7447 IC Output to Improve 6 and 9 Display on a 7-Segment
I’m using the 7447 BCD to 7-segment decoder IC with a common anode 7-segment display, and I’ve noticed something odd with how it shows the numbers 6 and 9:
For 6, it lights up segments f, e, d, c, g, ...
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Open drain inverter
I've got a chip with an active high open drain (i.e. high X normally, +Vcc when active) status pin that I'd like to feed to a bus with active low open collector. Both are running at the same voltage (...
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How is this flip flop expressed algebraically?
How is the following picture expressed in logical symbols? I’m confused about the crossing wires on the outputs to inputs.
Ref:ref
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XOR gate (74xx86) not XOR'ing with DRAM (4164) on breadboard
I have been trying to use a series of XOR gates (74LS86, 74HC86, even CD4070) to invert address lines going to a 4164 DRAM, but am having little luck. Here's a drawing to illustrate my setup on the ...
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How can I make an 8-Input AND gate?
How can I make an 8-Input AND gate?
I'm looking for guidance on how to make an 8-input AND gate. What would be the best approach? Should I use logic gates like ICs or try building it with transistors?
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Logic Gates with BJT-Transistors (Higher Output Voltage)
I want to build some parts of a simple 4-bit computer (AU, LU, registers, what else comes to my mind). The problem is that with every logic gate/transistor the voltage is dropping. So how can I ...
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SN75161B logic symbol confusion
I'm trying to control an ATE with custom hardware. It's mandatory to use GPIB. For this purpose I chose two IC's SN75161B and SN75160B.
Now I'm curious about what these 1's, 2's and 3's represent/...
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Identify SMD Part Marking AM and MO
I need to know the part number of this IC marked AM. It's probably a sot 70 placed between a master device and slave max7301 ic. My guess is it's a logic gate but I cannot find anything to be sure.
I ...
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Why are my LEDs not behaving properly upon wiring them to the outputs of my 74LS47 decoder? [closed]
Everything works properly in terms of logistics. I wired the inputs as LLHL following the truth table of the datasheet of the decoder (inputs are wired properly). Then I wired left LED to g and right ...
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Using an AND gate to control CD4053 switching
I have a design where I use two momentary switches to turn two different circuits on or off, but I'd also like to be able to use an AND gate to allow turning a third circuit on or off by ...
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Implementing a boolean function using at most 10 gates
I was given the following question:
Given the following truth table, implement the 2 functions needed for \$cout\$ and sum (\$s\$) using only XNOR, NAND and OR (only the 2 inputs version for each gate)...
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Is the use of optoisolators to isolate and clean a signal before an OR gate input good practice? If not what is better?
I am designing an alarm system for my employer. I am planning to use an OR gate to connect three different switches and have it so if any one of them are flipped the alarm will go off.
The problem I ...
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What is the pulse-width of this digital circuit?
So, I'm trying to interference three oscillated input of JKFF.
Resulting this:
Performing AND interference between hypothetic phase shift 45 degree and No phase shift resulting this new pulse-width ...
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74HC04 Input Issue
In a packaging machine, the machine starts working every time a button is pressed. R2 is a pull-up resistor. Button information goes to the machine from this pin. 5 V and GND come from the machine. I ...
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How to connect three 7-segment displays to a 4x4 binary multiplier
I am trying to connect three 7-segment displays to show the result. I thought about using the IC 7448 (I could also use the 7447), but I assigned 4 outputs to each encoder (first issue, as I need 3 ...
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Apparent contradiction in NAND implementation of XOR function
As I was trying to interpret the XOR function using only NAND gates, I came to a contradiction when looking up what the result should look like:
Step 1:
The following circuit is an unmodified ...
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Are Vcc and Vin the same thing for logic gates?
Using TTL a NOT Gate could be built like this:
(Image from https://users.cecs.anu.edu.au/~Matthew.James/engn2211-2002/labs/clab8node3.html)
It has two current sources Vcc and Vin and two current ...
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SR Flip Flop using AND and NOR Gate as a Quiz Button
I was tasked of making SR Flip Flop circuit using AND and NOR Gate that behaves similarly to a SR Flip Flop of OR and NAND Gate.
Picture 1 is the example of the behavior I wish to emulate.
Picture 2 ...
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How to make a SR latch that reacts to edges on its inputs?
I was wondering if there is a circuit that can do the function shown in the picture I have attached?
I want the output signal to be triggered high when signal A goes high. Then I want the output ...
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How are microprocessors designed to handle propagation delay and still operate sequentially?
In computer programming, it's easy to write code that operates sequentially, but in a logic circuit, where everything is on all at once, this isn't so simple.
Say I wanted to write some data to a ...
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Can this simple circuit be considered as a NOT gate?
In the above image considering V2 as a constant source of 5 V and V1 as the input which can be taken to be 0 V or 5 V, we get the voltage difference (vout2-vout1) as 5 V and 0 V respectively which ...
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Logic AND gate blows up - defective part?
as part of an open-source design I'm working on, I decided to include a "heartbeat" LED instead of just a power LED. The idea is that it powers on as soon as the main SBC is powered (it's an ...
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