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I'm designing a custom PCB using an STM32F103 microcontroller to control a triac-based light dimmer. The firing angle for the triac is determined by reading the voltage from the potentiometer.

The potentiometer output is routed through a header and then directly to an analog input pin (PA0) of the STM32, which uses the built-in ADC to read the value. For power supply filtering, I'm using an LC network to separate the analog supply (VDDA) from the digital supply (VDD), with the usual decoupling capacitors.

This project is part of my effort to learn how to build custom PCBs and improve my practical electronics design skills.

My main question:

Should I add an RC low-pass filter right at the analog input pin (PA0) for improved ADC readings?

  1. The potentiometer wires might be picking up noise.
  2. I want smooth, stable ADC readings to avoid flicker or erratic dimming.
  3. Does the STM32 ADC have any internal filtering/signal conditioning?
  4. If I should add an RC filter, what typical resistor and capacitor values do you recommend for this application?
  5. Any suggestions for good PCB layout practices for analog signals?

ADC Filtering

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  • \$\begingroup\$ A RC filter is a good idea. How fast do you need to sample? It is a compromise between sampling speed and noise suppression. And also dependent on you required resolution. \$\endgroup\$ Commented Sep 25 at 21:08
  • \$\begingroup\$ Thank you! For my application, the potentiometer sets the dimming level, and I want the adjustment to feel smooth, without visible flicker or jumps in brightness. I don't need extremely fast sampling; updating the dimming value a few times per second (for example, 10–20 Hz) would be more than enough, since the potentiometer won't be moving very quickly. My main concern is stable and repeatable ADC readings rather than high speed. \$\endgroup\$ Commented Sep 25 at 22:56
  • \$\begingroup\$ Something like 10k and 100nF should get you started. It’s also advisable to do filtering in your code to ensure the response you want. You can do simple averaging or maybe a median filter or first order IIR. There’s plenty of code examples on the webs. \$\endgroup\$ Commented Sep 26 at 3:35

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First of all, if you have an LC filter for VDDA, be sure it does not give you problems. I don't know how you came up with the values, but 27nH and 1.1uF give a resonant frequency of about 1 MHz and there is no damping. It might be best to omit it completely, or use an RC filter, or ferrite bead. The problem is also that the voltage difference between VDD and VDDA must always be within some limits of each other or the MCU does not work or may damage.

Sure, RC filter on ADC input may help, as you said wires may be long and can catch noise.

The potentiometer itself is a resistance, and you don't mention what value potentiometer it is. Generally ADCs have a limit on what is the range of source resistance for the ADC input. If you are below the range, such as with 10k pot, the ADC can read it fine. If you are above the range, like with 1Mohm pot, the ADC can't read the voltage well due to sampling capacitance. In that case, at least a capacitor is needed. However, in some STM32 models you can adjust the sampling time to allow higher source resistances without a capacitor. Check the data sheet for range of impedances the ADC can handle. The extra series resistor is usually not needed but if you just put 1 kohm there it won't add much series impedance, and 100nF cap should be large enough for sampling at high amount of bits at low speed even with high impedance pots. It will have 1.6 kHz lowpass effect, if pot resistance is ignored.

It should smooth out scratchy pot signal.

If that low-end STM32 has ADC hardware data filtering features, it reads in the data sheet. IIRC, higher end models support oversampling and give you an oversampled result if you configure it to do so. However, if you simply want to have a pot sampled at 10 Hz, your MCU will have no problems reading at 100 Hz or reading 10 times concecutively every 10 Hz then you can filter yourself.

The PCB layout question would require a book to answer, depending on your starting level. Just use a solid ground plane and keep analog signals away from digitally switching signals.

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  • \$\begingroup\$ Not "no damping"; a typical 1uF ceramic has 20mΩ ESR, putting the Q somewhat below 8. I would feel better with a ferrite bead of known loss though. Gross though that is, it might not matter: the impedance peak is still a modestly low <1.3 ohms. Does VDDA draw much of any current? Periodic peaks of say 10mA at Fo result in <13mV ripple, and less outside that frequency. (Also wonder what PSRR actually is... so lovely that they never tell in datasheets/appnotes...) Anyway, easily solved by adding ~200mΩ ESR at C8, or L1 for that matter. \$\endgroup\$ Commented Oct 27 at 0:18

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