Can I measure the internal termination resistance of a MIPI receiver?

To be honest with you, focusing on the receiver impedance is probably a huge waste of time.

Is it possible to measure the internal termination resistance of a chip using a multimeter?

In a word, no.

MIPI receivers dynamically enable and disable the termination depending on whether the link is in high-speed or low power mode. An unconnected receiver will be in low power mode and thus show no reading, explaining what you saw with the multimeter.

Should I instead be using TDR to measure the resistance?

Again, no. Trying to measure it with a TDR would also be pointless, for the same reason as for the multimeter.

What is the 'best' way to measure the resistance?

The vendor can do failure analysis on the device. As part of that process they would place the chip PHY into a test mode and validate the termination value as well as other parameters.

What will you find? Probably, the receiver termination value won’t be too far from nominal. This is tested during chip manufacturing and be guaranteed by the vendor to comply with MIPI specs.

On the other hand FA may reveal some possible damage, such as from ESD.

Let’s assume the chip is ok, a very reasonable assumption.

Faced with a stability problem like this, my first line of attack would be to look more closely at cabling.

I would also ask for more information about what the driver reports when frames are dropped. This might not be a MIPI problem at all. It could be a software problem, or a USB problem.

Anyway, back to MIPI cabling.

MIPI HS-Mode has a small swing (200mV) so it’s a bit fussy about cabling, especially as the PHY rates get higher.

Start by checking signal integrity at both ends of your MIPI link (you need a high speed scope and diff probe for this.) You might find that excessive cable loss is making the data receive eye close up.

Assuming cable loss is the problem, MIPI offers some help at the PHY level to overcome it:

• enable TxEQ (pre-emphasis) at the camera, or
• enable RxEQ at the receiver

Both EQ’s can help overcome cable losses and open the data eye back up. Note: use only one EQ type at at time.

A couple of other diagnostic things to try:

• lower your frame rate so you can use a lower speed PHY rate
• use shorter (or better) cables

If either of these are stable compared to your production setup, this will point the way to a cable loss issue.

You can also check the cable with a TDR to spot any issues like impedance discontinuities that could be distorting your signal (you’ll need to add a dummy terminator.) Also, if possible, check the cable frequency response.

If your cable is ok, and you have an acceptable receive data eye, there’s a couple of other things to check.

You mentioned your setup is dropping frames. What information do you have about those frame drops? Is your CSI-2 receiver actually reporting packet errors?

If you’re not actually getting receive errors, could the issue be instead on the USB side? That’s another signal integrity challenge that is sensitive to its cable.

Finally, could there be a possible system noise issue? Check your cable shielding and grounding.

What is the 'best' way to measure the resistance?

Don't measure it at all, it doesn't exist as a constant, nor does it really matter.

Instead consider this: Why do you wonder about the resistance? Because you want to drive the chip with the right impedance – both in transmission line characteristic impedance as well as in source impedance.

The resistance at DC alone won't be what matters – for all we know it might be AC coupled according to your measurement – what matters is the impedance at the target frequencies.

No way to measure that at DC / with a multimeter. What you would want to do is getting a calibrated vector network analyzer (VNA), construct a well-tested measurement PCB, calibrate that yourself and use that to de-embed it, so that your measurement plane is at the IC contacts, not at where you probe the board. Then, you'd let the network analyzer run through the relevant frequency range – probably the first subharmonic of the clock through to the 7th or 9th harmonic. You would get a curve that describes your chips impedance over the relevant frequency ranges.

Should I instead be using TDR to measure the resistance?

That's a valid approach to measure a purely linear, passive, termination, indeed – if you have good knowledge on the line up to there and the necessary bandwidth.