On referencing power planes and return current paths

Question

I recently worked on a 16-layer board design that contained only 2 ground planes, at the outer layers of the board, and several power planes (+1V1, +1V8, +3V0, +5V0) in the middle:

board stackup image

Since there are only 2 ground planes, a majority of the signal traces are referenced to power planes, which is bad, because switching noise will be coupled to these planes.

Please look at the following image and suppose we have a switching signal on layer IN_5H:

Have I drawn the return currents correctly here? Am I correct in assuming that the only way the current induced on plane +5V0 can return to the source is through a stitching capacitor? It seems to me that the best position for this capacitor, to keep loop length short, is nearest the IC pin output. Is this correct?

It probably could have been done in less layers. I inherited this design and the client doesn't seem to mind paying for it. — dext0rb
– dext0rb, Commented Sep 20, 2013 at 0:21

apalopohapa · Accepted Answer · 2013-09-21 00:08:41Z

I agree with you. Current will be induced onto the +5V0 plane even though it is not the driver's power plane because it is capacitively coupled to the signal traces.

Regarding the positive edge of the pulses:

Current injected onto the +5V0 plane coming from the signal traces as this capacitance gets discharged will go to ground via its bypass capacitors, and then it needs to go back to the +3V0 plane via the +3V0 caps and into the driver's power input, completing the circuit.

Having bypass capacitors sprinkled about on both planes allows the current jump to ground and from there to +3V0 (which is also the best return path you have) quickly.

Bypass capacitors near the driver (on the +3V0 plane) are very important anyway because they constitute the local energy storage to charge the transmission line, and they minimize the loop and inductance, and like you say, are how the current injected onto the +5V0 goes back to the source (but you can have others that are not necessarily next to the driver).

The negative edges of the pulses should follow a similar logic.

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