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How do you calculate the number of vias needed in a PCB?

My situation - I have a 4 layer board, I have power polygon on all 4 layers stitched using vias.

I used KiCad calculator for via sizing, I am using a via of hole size 0.3 mm and diameter of 0.7 mm, a 0.2 mm annular ring. According to the tool I can have 11.7 A per via so for a current rating of 120 A suppose can I go with having 10 - 11 vias? Or am I missing anything here?

If I put multiple vias in parallel would that decrease the overall inductance of the polygon I am connecting?

If I have multiple vias then would that mean that my effective resistance is also less and so is the voltage drop as shown in the tool?

Do vias also help in better heat transfer and heat distribution evenly? If yes then, how should I space them? Should I have clusters of vias at random places, or should I have equal spacing on the vias on my polygon? Is there any specific layout style that I should go with? Are there any reference materials for the same?

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  • \$\begingroup\$ "Power" and not ground, on 4 layers?? The one thing that's sure to increase inductance is not having a ground plane. \$\endgroup\$ Commented Sep 12 at 14:07
  • \$\begingroup\$ I do have a ground polygon, under the mosfet terminals i have my power polygon on all the layer and then stitching them, gnd is not just under them \$\endgroup\$ Commented Sep 12 at 14:56

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if I put multiple vias in parallel would that decrease the over inductance of the polygon I am connecting? If I have multiple vias then would that mean that my effective resistance is also less and so is the voltage drop as shown in the tool?

More vias, less inductance, less electrical resistance, less thermal resistance.

When the tool gives an ampacity of 11 A per via, what is the limiting factor it's assuming? Temperature rise? Voltage drop? You can always use more vias, for less of either. Vias are more or less free, once you use any, and most people would want to minimise temperature and voltage drop.

If you get fed up with placing vias and you have enough of them, do you spread them evenly, or cluster? It depends where you want the current to flow. If you have a device where current rapidly switches between two paths, a boost converter for instance, then you will want to constrain tightly the path the current takes for minimum excess inductance. Then you cluster all the vias where you want the current to flow. Otherwise, you can spread them out evenly. Or pattern them into your logo.

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You have not mentioned the type of circuitry the PCB is designed for. E.g. Audio (analog or digital), video, high speed digital, microcontroller, etc.

The reason I bring this up is that you may be over-designing the PCB and don't need a 4-layer card at all, let alone all of the fuss over via count, thermal analysis etc. I have designed many ATmega micro-based PCBs running at 8-16 MHz clock on 2-layer PCBs. In these types of micro-P circuits, proper power supply bypassing is more important than ground planes.

I am providing this answer because I have seen many cases in which PCBs are needlessly complex (and more expensive) for the task they perform.

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    \$\begingroup\$ I notice he quotes 120 A, so I'm guessing it's not audio \$\endgroup\$ Commented Sep 12 at 15:28

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