2
\$\begingroup\$

I'm working on a temperature controller circuit that uses an ESP32 to activate a relay based on temperature readings from sensors. This relay, in turn, controls a contactor.

I've encountered an issue where the ESP32 completely freezes when the contactor opens, probably due to the noise as shown in the oscilloscope (measuring the 5v power supply) screenshot attached. The noise generated during the contactor's operation seems to interfere with the ESP32. I've also attached the schematic of my PCB and the wiring diagram for the contactor. Additionally, I've included a video demonstrating the ESP freezing when I manually toggle the relay using a button.

Does anyone have experience with this kind of issue or suggestions for mitigating the noise? I’m considering solutions like snubber circuits, flyback diodes, or optoisolation, but I'd like to hear from others before proceeding.

Circuit diagram

Osciloscope noise when contactor opens

PCB Layout

Video showing it freezing (second 5 - couldn't find a way to upload here - it's got 4 contactor to speed up the freezing): https://youtube.com/shorts/SMRyH60qVf4?feature=share

EDIT 1:

  1. I’ve now added the PCB layout photo to give more context about the design. Hopefully, this helps clarify things further.

  2. From what I understand of my circuit, I’ve already included decoupling capacitors. However, I might be missing something in their placement or specifications. Could you advise on what I should double-check here? (the contactor acts in AC voltage, not DC)

  3. Regarding the snubber, I’m not sure where exactly to place it. Since the idea is for this to be a commercial product, I won’t have control over the type of contactor used or the wiring setup (e.g., whether users will employ twisted pairs). Because of this, any solution has to be implemented directly on the PCB of the controller itself.

  4. I don't think the problem in through radiation because I tested putting the contactor pretty far away from the board and still the uC froze...

EDIT 2: Osciloscope image on the 3.3V (right on the uC pwr supply): Noise on 3.3V

Any help would be greatly appreciated!

\$\endgroup\$
9
  • 1
    \$\begingroup\$ This has been asked a lot. Your case is similar. Relay contacts arc and spark right near the MCU due to whatever you are switching and radiated electromagnetic interference zaps the MCU. Have you searched for similar questions with answers how to solve it? We also don't know what you are switching and from where the 5V comes. \$\endgroup\$ Commented Dec 3, 2024 at 17:26
  • 1
    \$\begingroup\$ Missing decoupling capacitors. What does your layout look like? \$\endgroup\$ Commented Dec 3, 2024 at 17:47
  • \$\begingroup\$ @winny just added the pcb layout to the post. Thanks! \$\endgroup\$ Commented Dec 3, 2024 at 20:37
  • \$\begingroup\$ No ground plane? I would start by adding 100 nF between Vcc and ground on all ICs, even more on your MCU. \$\endgroup\$ Commented Dec 3, 2024 at 22:28
  • \$\begingroup\$ Considerations in the answers are extremely valid. However, optimized contactor operation is complex and has not been covered here. A very good article (only in Portuguese, you won't have any difficulties) is this: repositorio.ufsc.br/handle/123456789/86677?show=full I recommend reading the entire article but, if you want to get straight to the point, see chapter 4. I did not write this article and have not tested any circuits presented in it. \$\endgroup\$ Commented Dec 4, 2024 at 16:11

3 Answers 3

7
\$\begingroup\$

I looked over your "layout" artwork with a sight toward the GND plane. The colored image below is showing just how patchwork the GND fill is with each color depicting what I can best judge as the various split areas.

enter image description here

This is an improper implementation for the GND even if there happens to be another GND plane in this design. You will need to visit the possibility of making sure that there is as much continuity between sections as possible even if that means:

  1. Adding trace straps on another layer and vias into the GND sections here to provide for connectivity.
  2. Routing some signal traces so they stitch through vias to another layer part of the time so as to allow the GND fill here to flow between the sections shown in different colors.
  3. Make a multilayer board (4 or 6 layers) so you can have a more full GND plane that is not cut up so much by component footprints and traces.
  4. Add numerous additional vias from GND pour regions to connect into other GND regions on other layers.

Continuous GND and PWR planes are an absolute first level necessity to control circuit noise, emissions and susceptibility.

\$\endgroup\$
4
  • \$\begingroup\$ Just curious since this would be helpful for me in the future, how did you separate and color code the different sections of GND, where the GND pour is broken apart? \$\endgroup\$ Commented Dec 4, 2024 at 18:33
  • 1
    \$\begingroup\$ @J.Street - I loaded your picture into Microsoft PAINT program. I used the paint bucket pour tool to have it flood various areas to the color selections. I had to look carefully at the artwork picture to see where it appeared that various components were connected to the GND and where the fill areas were segmented by other things in the picture such as texts or component outlines or other things. I may have missed some things due to the nature of your picture and so may have ended up with more or less regions than there actually are present. I hope my analysis was helpful for the (cont) \$\endgroup\$ Commented Dec 4, 2024 at 20:37
  • \$\begingroup\$ (continued from previous) present problem. Also be aware in future if you intend to get actual help from posting artwork that you really need to post more than just one layer. \$\endgroup\$ Commented Dec 4, 2024 at 20:38
  • \$\begingroup\$ I think I missed that @J.Street is not the original question poster here. Please take what I commented above into consideration of this. \$\endgroup\$ Commented Dec 4, 2024 at 20:44
4
\$\begingroup\$

This is a common electromagnetic interference problem. The contactor current loop with inductance radiates broadband noise which easily is picked up by exposed wires connected to the ESP32.

Interference can be conducted and radiated.

  • Avoid shared ground paths for conducted noise.
  • Avoid exposed single wires on both offending switched-off arcs and sensitive uC I/O wires.
  • Use twisted pairs or shielded twisted pairs to attenuate RF noise generated by the arc for both the radiator contactor current loop and the detector (uC) (all I/O wires.
  • use a suitable snubber for the contacts to minimize slew rate of voltage with a controlled slew rate of current. Choosing the wrong low ESR cap on the contactor may cause high dI/dt current interference on closure ( not yet)and no RC snubber on the contacts is causing you high dV/dt interference coupling.

There are many methods required to suppress emissions and reception where all the unshielded wires act like antenna.

  • shielding, ferrite CM choke filtering, twisted pair balancing or adding Baluns to balance unbalanced line/return emissions
  • using twisted pairs for all inductive loads from dry contacts opening V= LdI/dt.

In order to focus on the best approach requires full disclosure of the layout and supplies, ground paths and load type. The purpose of the switched load helps to find common solutions.

Henry Ott's textbook on EMC is full of problem descriptions and solutions. Random suggestions might work but may not be optimal.

\$\endgroup\$
2
  • \$\begingroup\$ Hey @D.A.S, thanks for the reply, it was really helpful and gave me a better understanding of the problem. The points you made about interference, ground paths, and twisted pairs make a lot of sense, and I’ll definitely look into Henry Ott’s book for more insights. I've added an "edit" on the post to try and help clarify a couple things \$\endgroup\$ Commented Dec 3, 2024 at 20:33
  • \$\begingroup\$ books.google.ca/… maybe your best library has it \$\endgroup\$ Commented Dec 3, 2024 at 22:02
2
\$\begingroup\$

If the conctator is passing DC, and the load can tolerate slow rise and fall times in its power, you could add a capacitor in parallel with the contacts.

You can also add a capacitor in parallel with the power supply connections to your microprocessor board.

\$\endgroup\$
1
  • \$\begingroup\$ I forgot to add the PCB layout, just added now. The contactor act in AC voltage, so I wouldn't be able to add capacitors in the load. As for the capacitor, for what I understand I already have them (see C2/C3/C4/C17 in the schematic) \$\endgroup\$ Commented Dec 3, 2024 at 18:46

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Start asking to get answers

Find the answer to your question by asking.

Ask question

Explore related questions

See similar questions with these tags.