When using Verilog, when should you use default operators like a + b, and when should you implement your own version of the hardware, like writing a full adder? Is it only when you need a specific need, or is it better practice to know exactly what hardware is being generated?
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\$\begingroup\$ I don't have recent experience with tools, but experience more than a decade back caused me to spend the time needed to properly synthesize and floorplan these by hand. The synthesis tools were, then, terrible. (Mostly, it was the routing that was absolutely terrible. The synthesis wasn't great, but it wasn't quite terrible, either.) Were it me doing this today? I'd first verify by creating non-trivial tests and see how it gets synthesized and floorplanned. Good enough? I'd stay at a higher level. But if not, there's no way I'd trust a complex design to inferior synthesis and floorplanning. \$\endgroup\$periblepsis– periblepsis2024-01-13 03:34:21 +00:00Commented Jan 13, 2024 at 3:34
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2 Answers
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It is best to describe your hardware using the highest level of abstraction as possible with Verilog. This means you should prefer a + b over creating full-adder instances.
You end up with fewer lines of Verilog code, which makes the code easier to understand and maintain. As your design becomes larger and larger, the amount of code will become huge when creating gate instances, relative to the more abstract + (and the like) operators. Less code also means faster simulation times.
Generally, you will want to take advantage of synthesis software to convert your Verilog code into hardware, be it FPGA or ASIC. Using the higher level abstractions could allow your synthesis tool more freedom to implement more efficient hardware (faster, smaller area, etc.).
Creating basic building blocks like full-adders has its use for teaching purposes, but you'll quickly find yourself out-growing the need for modeling at such a low level of abstraction.
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We no longer implement our own hardware like Jack Kilby did in 1958 creating the first Integrated Circuit. Even if you write the Boolean equations for a full adder, some tool needs to synthesize and map those equations to a set of transistors or logic gates.
Synthesis tools have captured millions of hours of human intelligence to implement circuits with the best performance and area in the least amount of time. So unless you think you have come up with some new implementation a synthesis tool has never seen before, you should write your code at the highest level of abstraction your tool can understand.
