How does input resistance cause phase lag in the output in a voltage follower circuit?

The open loop gain and bandwidth define a gain Bode plot. Since the bandwidth is given as 10 Hz, we can assume there is a single pole in the Bode plot at 10 Hz and the slope is -20 dB per decade. Here is the plot.

Note that a gain of \$ 10^5 \$ is 100 dB. And a gain of 1 is 0 dB.

The effect of feedback is to reduce the DC gain and increase the bandwidth. The Bode plot provides a simple way to locate the new bandwidth, because the gain decreases at 20 dB per decade of frequency.

This type of plot can be hand sketched also.

For a single pole low-pass response, the output phase offset, \$ \theta \$, can be calculated using this formula: (found here)

$$\theta = -arctan(2 \times \pi \times f \times \tau)$$

\$ \tau \$ is the time constant of the response, and f is the frequency in Hz. We can find \$ \tau \$ for the closed-loop amplifier using the low-pass bandwidth. For the closed-loop amplifier, the bandwidth is 1 MHz. First we convert that to radians per second: \$ 1 MHz \times 2 \times \pi = 6,280,000 \$ rad/second

\$ \tau \$ is the reciprocal of that. \$ \tau = \left( \frac {1} {6,280,000} \right) = 159 ns \$

Now we can calculate phase lag, \$ \theta \$, at 80 kHz for the closed loop amplifier.

$$ \theta = -atan(2 \times \pi \times 80,000 \times 159 \times 10^9) = -0.0798 radians $$
$$ -0.0798 \times \frac {180}{\pi} = -4.57 degrees $$

All images were created by me.