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I'm currently studying Embedded Systems and in the topic of drawing a schematic for the address of a microprocessor (16bits address x 8 bit data (64Kbytes)) with 1 ROM 32Kx8 and 1 RAM 32Kx8, I simply cannot understand why A15 is the address for memory selection and why there's a NOT gate in A15 preceding the RAM memory.

I attached a picture with the schematics from what I refered.

Thanks for all the help!

PS: I've might not used the correct words for the right terms since I'm not learning this topic in english!

Schematic of the problem

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  • \$\begingroup\$ Some Harvard architecture thing, mayhaps? \$\endgroup\$ Commented Dec 16, 2020 at 13:49
  • \$\begingroup\$ Chip Select (/CS) should be low for a particular part of memory to be active. You can see it like this: In what part of the address space does the RAM need to be active and what value does A15 have in that part of the address space? And: What is the easiest way to make /CS low (to select the RAM) in that part of the address space? \$\endgroup\$ Commented Dec 16, 2020 at 14:50
  • \$\begingroup\$ I pretty sure I got it @StarCat! Thanks a lot! \$\endgroup\$ Commented Dec 16, 2020 at 16:20

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You should be able to work this out ... Here's a hint for the NOT gate question : The memory address for the ROM and the RAM cannot overlap. If you work this one out then why A15 is used as Chip Select on both memories should come easy ;-)

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  • \$\begingroup\$ After tackling your logic, think I couldn't go nowhere :-(. But here is what I thought regarding what you said: The part of the ROM and RAM cannot overlap implies that when signals are passing through the ADDR (cables) one of the memories must be in high impedance (deactivated). The A15 I cannot still really understand :((. \$\endgroup\$ Commented Dec 16, 2020 at 16:13
  • \$\begingroup\$ @DiogoGonçalves What would happen if the NOT gate wasn't there? What data would the CPU get when it accessed address 0x1234? Would it come from the RAM chip or the ROM chip? And what data would the CPU get when it addressed address 0xABCD? Would it come from the RAM chip or the ROM chip? \$\endgroup\$ Commented Feb 16, 2021 at 15:43
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This is something the designer of the system can choose.

The CPU doesn't know about your different types of memory chips. The CPU puts an address like 0x1234 (0001 0010 0011 0100) onto the address bus, and reads the data from the data bus. It doesn't know which chip is outputting the data to the data bus.

This designer has chosen that addresses 0x0000 - 0x7FFF will access the ROM chip, and addresses 0x8000 - 0xFFFF will access the RAM chip.

Therefore, the ROM chip should be selected when the address is 0x0000-0x7FFF, and the RAM chip should be selected when the address is 0x8000-0xFFFF.

How do we do that? It is easy: connect A15 like it is shown. When the address is 0x0000-0x7FFF, A15 is 0. This means the ROM chip's /CS is 0, so it is selected. And the RAM chip's /CS is 1, so it is not selected. When the address is 0x8000-0xFFFF, A15 is 1. This means the ROM chip's /CS is 1, so it is not selected, and the RAM chip's /CS is 0, so it is selected.

What would happen if there wasn't a NOT gate? Then addresses 0x0000-0x7FFF would activate both chips, and addresses 0x8000-0xFFFF wouldn't activate either chip.

You notice that it's very convenient to divide the addresses this way. If we decided that that addresses 0x0000-0x1234 were ROM, addresses 0x1235-0x2111 were RAM, addresses 0x2112-0x3301 were ROM, etc... it would be very difficult to make a circuit to decide which chip to select! That is why we almost always use 0x0000-0x7FFF and 0x8000-0xFFFF when there are two chips.

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